%0 Journal Article %1 journals/mr/GhidiniGGGBPSCI03 %A Ghidini, G. %A Garavaglia, A. %A Giusto, G. %A Ghetti, Andrea %A Bottini, R. %A Peschiaroli, D. %A Scaravaggi, M. %A Cazzaniga, F. %A Ielmini, Daniele %D 2003 %J Microelectron. Reliab. %K dblp %N 8 %P 1221-1227 %T Impact of gate stack process on conduction and reliability of 0.18 mum PMOSFET. %U http://dblp.uni-trier.de/db/journals/mr/mr43.html#GhidiniGGGBPSCI03 %V 43

@article{journals/mr/GhidiniGGGBPSCI03, added-at = {2022-10-02T00:00:00.000+0200}, author = {Ghidini, G. and Garavaglia, A. and Giusto, G. and Ghetti, Andrea and Bottini, R. and Peschiaroli, D. and Scaravaggi, M. and Cazzaniga, F. and Ielmini, Daniele}, biburl = {https://www.bibsonomy.org/bibtex/240a4a01a83b8befc1b1ef809a9cfc662/dblp}, ee = {https://doi.org/10.1016/S0026-2714(03)00175-6}, interhash = {4b8808b958cb3bedc0911d62140a083e}, intrahash = {40a4a01a83b8befc1b1ef809a9cfc662}, journal = {Microelectron. Reliab.}, keywords = {dblp}, number = 8, pages = {1221-1227}, timestamp = {2024-04-09T02:49:44.000+0200}, title = {Impact of gate stack process on conduction and reliability of 0.18 mum PMOSFET.}, url = {http://dblp.uni-trier.de/db/journals/mr/mr43.html#GhidiniGGGBPSCI03}, volume = 43, year = 2003 }