%0 Conference Paper %1 conf/icecsys/KleineZW02 %A Kleine, Ulrich %A Zhang, Lihong %A Wolf, Markus %B ICECS %D 2002 %I IEEE %K dblp %P 1135-1138 %T Mismatch optimization for analog circuits using the DesignAssistant. %U http://dblp.uni-trier.de/db/conf/icecsys/icecsys2002.html#KleineZW02 %@ 0-7803-7596-3

@inproceedings{conf/icecsys/KleineZW02, added-at = {2021-01-15T00:00:00.000+0100}, author = {Kleine, Ulrich and Zhang, Lihong and Wolf, Markus}, biburl = {https://www.bibsonomy.org/bibtex/210490a7a0341a6cb49dd7002ebc67911/dblp}, booktitle = {ICECS}, crossref = {conf/icecsys/2002}, ee = {https://doi.org/10.1109/ICECS.2002.1046452}, interhash = {501ff4ce6eb72ddbbcd73341042d26d3}, intrahash = {10490a7a0341a6cb49dd7002ebc67911}, isbn = {0-7803-7596-3}, keywords = {dblp}, pages = {1135-1138}, publisher = {IEEE}, timestamp = {2024-04-09T16:20:38.000+0200}, title = {Mismatch optimization for analog circuits using the DesignAssistant.}, url = {http://dblp.uni-trier.de/db/conf/icecsys/icecsys2002.html#KleineZW02}, year = 2002 }