@article{journals/corr/abs-2403-18702,
added-at = {2024-07-17T00:00:00.000+0200},
author = {Zhou, Zhe and Chen, Yiqi and Zhang, Tao and Wang, Yang and Shu, Ran and Xu, Shuotao and Cheng, Peng and Qu, Lei and Xiong, Yongqiang and Sun, Guangyu},
biburl = {https://www.bibsonomy.org/bibtex/20f6c0aace6d339fbe0bd02cfff5fa33f/dblp},
ee = {https://doi.org/10.48550/arXiv.2403.18702},
interhash = {5af7b190165304739876fd614f5ee032},
intrahash = {0f6c0aace6d339fbe0bd02cfff5fa33f},
journal = {CoRR},
keywords = {dblp},
timestamp = {2024-07-22T07:11:40.000+0200},
title = {Toward CXL-Native Memory Tiering via Device-Side Profiling.},
url = {http://dblp.uni-trier.de/db/journals/corr/corr2403.html#abs-2403-18702},
volume = {abs/2403.18702},
year = 2024
}