%0 Conference Paper %1 conf/vlsic/OhLSBCSLCKJC14 %A Oh, Reum %A Lee, Byunghyun %A Shin, Sang-Woong %A Bae, Wonil %A Choi, Hundai %A Song, Indal %A Lee, Yun-Sang %A Choi, Jung-Hwan %A Kim, Chi-Wook %A Jang, Seong-Jin %A Choi, Joo-Sun %B VLSIC %D 2014 %I IEEE %K dblp %P 1-2 %T Design technologies for a 1.2V 2.4Gb/s/pin high capacity DDR4 SDRAM with TSVs. %U http://dblp.uni-trier.de/db/conf/vlsic/vlsic2014.html#OhLSBCSLCKJC14 %@ 978-1-4799-3327-3

@inproceedings{conf/vlsic/OhLSBCSLCKJC14, added-at = {2016-03-16T00:00:00.000+0100}, author = {Oh, Reum and Lee, Byunghyun and Shin, Sang-Woong and Bae, Wonil and Choi, Hundai and Song, Indal and Lee, Yun-Sang and Choi, Jung-Hwan and Kim, Chi-Wook and Jang, Seong-Jin and Choi, Joo-Sun}, biburl = {https://www.bibsonomy.org/bibtex/246f3f076bcc1ed9ca080cb7fb600c31e/dblp}, booktitle = {VLSIC}, crossref = {conf/vlsic/2014}, ee = {http://dx.doi.org/10.1109/VLSIC.2014.6858367}, interhash = {5fb4f650da5ec2e5b8064938ee88140e}, intrahash = {46f3f076bcc1ed9ca080cb7fb600c31e}, isbn = {978-1-4799-3327-3}, keywords = {dblp}, pages = {1-2}, publisher = {IEEE}, timestamp = {2016-03-17T11:44:36.000+0100}, title = {Design technologies for a 1.2V 2.4Gb/s/pin high capacity DDR4 SDRAM with TSVs.}, url = {http://dblp.uni-trier.de/db/conf/vlsic/vlsic2014.html#OhLSBCSLCKJC14}, year = 2014 }