Inproceedings,
DRackSim: Simulating CXL-enabled Large-Scale Disaggregated Memory Systems.
A. Puri, K. Bellamkonda, K. Narreddy, J. Jose, V. Tamarapalli, and V. Narayanan.SIGSIM-PADS, page 3-14. ACM, (2024)
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- conf/pads/PuriBNJTN24
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- inproceedings
- booktitle
- SIGSIM-PADS
- year
- 2024
- pages
- 3-14
- publisher
- ACM
- crossref
- conf/pads/2024
- ee
- https://doi.org/10.1145/3615979.3656059
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- http://dblp.uni-trier.de/db/conf/pads/pads2024.html#PuriBNJTN24
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%1 conf/pads/PuriBNJTN24
%A Puri, Amit
%A Bellamkonda, Kartheek
%A Narreddy, Kailash
%A Jose, John
%A Tamarapalli, Venkatesh
%A Narayanan, Vijaykrishnan
%B SIGSIM-PADS
%D 2024
%E Loper, Margaret
%E Pellegrini, Alessandro
%I ACM
%K dblp
%P 3-14
%T DRackSim: Simulating CXL-enabled Large-Scale Disaggregated Memory Systems.
%U http://dblp.uni-trier.de/db/conf/pads/pads2024.html#PuriBNJTN24
@inproceedings{conf/pads/PuriBNJTN24,
added-at = {2024-06-19T00:00:00.000+0200},
author = {Puri, Amit and Bellamkonda, Kartheek and Narreddy, Kailash and Jose, John and Tamarapalli, Venkatesh and Narayanan, Vijaykrishnan},
biburl = {https://www.bibsonomy.org/bibtex/2d2fae50c0428d7e66f8361d47f2d2f2d/dblp},
booktitle = {SIGSIM-PADS},
crossref = {conf/pads/2024},
editor = {Loper, Margaret and Pellegrini, Alessandro},
ee = {https://doi.org/10.1145/3615979.3656059},
interhash = {690649076364076a20854c3e681e8769},
intrahash = {d2fae50c0428d7e66f8361d47f2d2f2d},
keywords = {dblp},
pages = {3-14},
publisher = {ACM},
timestamp = {2024-06-24T07:23:34.000+0200},
title = {DRackSim: Simulating CXL-enabled Large-Scale Disaggregated Memory Systems.},
url = {http://dblp.uni-trier.de/db/conf/pads/pads2024.html#PuriBNJTN24},
year = 2024
}