%0 Journal Article %1 journals/mta/KashyapBG24 %A Kashyap, Sidharth %A Bhandari, Ashish Kumar %A Giri, Pushpa %D 2024 %J Multim. Tools Appl. %K dblp %N 9 %P 25595-25615 %T Low resource FPGA implementation based efficient image edge detector architecture. %U http://dblp.uni-trier.de/db/journals/mta/mta83.html#KashyapBG24 %V 83

@article{journals/mta/KashyapBG24, added-at = {2024-03-16T00:00:00.000+0100}, author = {Kashyap, Sidharth and Bhandari, Ashish Kumar and Giri, Pushpa}, biburl = {https://www.bibsonomy.org/bibtex/207036dc8c86b091cf4364a7addc2fc37/dblp}, ee = {https://doi.org/10.1007/s11042-023-16472-w}, interhash = {79eecdf0dc4232b7d765f2920d695864}, intrahash = {07036dc8c86b091cf4364a7addc2fc37}, journal = {Multim. Tools Appl.}, keywords = {dblp}, month = {March}, number = 9, pages = {25595-25615}, timestamp = {2024-04-08T15:18:06.000+0200}, title = {Low resource FPGA implementation based efficient image edge detector architecture.}, url = {http://dblp.uni-trier.de/db/journals/mta/mta83.html#KashyapBG24}, volume = 83, year = 2024 }