%0 Journal Article %1 journals/tcad/BansalPR06 %A Bansal, Aditya %A Paul, Bipul Chandra %A Roy, Kaushik %D 2006 %J IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. %K dblp %N 12 %P 2765-2774 %T An Analytical Fringe Capacitance Model for Interconnects Using Conformal Mapping. %U http://dblp.uni-trier.de/db/journals/tcad/tcad25.html#BansalPR06 %V 25

@article{journals/tcad/BansalPR06, added-at = {2020-09-24T00:00:00.000+0200}, author = {Bansal, Aditya and Paul, Bipul Chandra and Roy, Kaushik}, biburl = {https://www.bibsonomy.org/bibtex/289768ef5acc300284d8c77ad6085035c/dblp}, ee = {https://doi.org/10.1109/TCAD.2006.882489}, interhash = {9f183f770b4dfb6f2c86d17d957572d9}, intrahash = {89768ef5acc300284d8c77ad6085035c}, journal = {IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.}, keywords = {dblp}, number = 12, pages = {2765-2774}, timestamp = {2020-09-25T11:45:16.000+0200}, title = {An Analytical Fringe Capacitance Model for Interconnects Using Conformal Mapping.}, url = {http://dblp.uni-trier.de/db/journals/tcad/tcad25.html#BansalPR06}, volume = 25, year = 2006 }