%0 Journal Article %1 journals/tvlsi/PotlapallyRRLJ07 %A Potlapally, Nachiketh R. %A Ravi, Srivaths %A Raghunathan, Anand %A Lee, Ruby B. %A Jha, Niraj K. %D 2007 %J IEEE Trans. Very Large Scale Integr. Syst. %K dblp %N 5 %P 605-609 %T Configuration and Extension of Embedded Processors to Optimize IPSec Protocol Execution. %U http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi15.html#PotlapallyRRLJ07 %V 15

@article{journals/tvlsi/PotlapallyRRLJ07, added-at = {2021-10-14T00:00:00.000+0200}, author = {Potlapally, Nachiketh R. and Ravi, Srivaths and Raghunathan, Anand and Lee, Ruby B. and Jha, Niraj K.}, biburl = {https://www.bibsonomy.org/bibtex/22af3d04c67c18a72ce4dd43311d11cf5/dblp}, ee = {https://doi.org/10.1109/TVLSI.2007.896912}, interhash = {a3cff46d9697256d0ea3fa254c5d13b8}, intrahash = {2af3d04c67c18a72ce4dd43311d11cf5}, journal = {IEEE Trans. Very Large Scale Integr. Syst.}, keywords = {dblp}, number = 5, pages = {605-609}, timestamp = {2024-04-08T14:32:02.000+0200}, title = {Configuration and Extension of Embedded Processors to Optimize IPSec Protocol Execution.}, url = {http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi15.html#PotlapallyRRLJ07}, volume = 15, year = 2007 }