Аннотация
Technology advances allow integrating on a single chip
entire system, including memories and peripherals. The
test of these devices is becoming a major issue for
manufacturing industries. This paper presents a
methodology for inducing test-programs similar to
genetic programming. However, it includes the ability
to explicitly specify registers and resorts to directed
acyclic graphs instead of trees. Moreover, it exploits
a database containing the assembly-level semantic
associated to each graph node. This approach is
extremely efficient and versatile: candidate solutions
are translated into source-code programs allowing
millions of evaluations per second. The proposed
approach is extremely versatile: the macro library
allows easily changing target processor and
environment. The approach was verified on three
processors with different instruction sets, different
formalisms and different conventions. A complete set of
experiments on a test function are also reported for
the SPARC processor.
Пользователи данного ресурса
Пожалуйста,
войдите в систему, чтобы принять участие в дискуссии (добавить собственные рецензию, или комментарий)