%0 Journal Article %1 journals/jssc/OkaniwaTKYCOTWK05 %A Okaniwa, Yusuke %A Tamura, Hirotaka %A Kibune, Masaya %A Yamazaki, Daisuke %A Cheung, Tsz-Shing %A Ogawa, Junji %A Tzartzanis, Nestoras %A Walker, William W. %A Kuroda, Tadahiro %D 2005 %J IEEE J. Solid State Circuits %K dblp %N 8 %P 1680-1687 %T A 40-Gb/s CMOS clocked comparator with bandwidth modulation technique. %U http://dblp.uni-trier.de/db/journals/jssc/jssc40.html#OkaniwaTKYCOTWK05 %V 40

@article{journals/jssc/OkaniwaTKYCOTWK05, added-at = {2022-03-02T00:00:00.000+0100}, author = {Okaniwa, Yusuke and Tamura, Hirotaka and Kibune, Masaya and Yamazaki, Daisuke and Cheung, Tsz-Shing and Ogawa, Junji and Tzartzanis, Nestoras and Walker, William W. and Kuroda, Tadahiro}, biburl = {https://www.bibsonomy.org/bibtex/2a92dbe464ebf2d070d4aa64d5b031b8d/dblp}, ee = {https://doi.org/10.1109/JSSC.2005.852014}, interhash = {ba5390f262d85fb4f37889a81b206be2}, intrahash = {a92dbe464ebf2d070d4aa64d5b031b8d}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, number = 8, pages = {1680-1687}, timestamp = {2024-04-08T10:42:14.000+0200}, title = {A 40-Gb/s CMOS clocked comparator with bandwidth modulation technique.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc40.html#OkaniwaTKYCOTWK05}, volume = 40, year = 2005 }