%0 Journal Article %1 journals/jssc/OkamuraTTONTIKYY95 %A Okamura, Hitoshi %A Toyoshima, Hideo %A Takeda, Koichi %A Oguri, Takashi %A Nakamura, Satoshi %A Takada, Masahide %A Imai, Kiyotaka %A Kinoshita, Yasushi %A Yoshida, Hiroshi %A Yamazaki, Tom %D 1995 %J IEEE J. Solid State Circuits %K dblp %N 11 %P 1196-1202 %T A 1 ns, 1 W, 2.5 V, 32 Kb NTL-CMOS SRAM macro using a memory cell with PMOS access transistors. %U http://dblp.uni-trier.de/db/journals/jssc/jssc30.html#OkamuraTTONTIKYY95 %V 30

@article{journals/jssc/OkamuraTTONTIKYY95, added-at = {2023-05-03T00:00:00.000+0200}, author = {Okamura, Hitoshi and Toyoshima, Hideo and Takeda, Koichi and Oguri, Takashi and Nakamura, Satoshi and Takada, Masahide and Imai, Kiyotaka and Kinoshita, Yasushi and Yoshida, Hiroshi and Yamazaki, Tom}, biburl = {https://www.bibsonomy.org/bibtex/2c0c8b2e462fbddec0e4d32006df7974c/dblp}, ee = {https://doi.org/10.1109/4.475707}, interhash = {bf75de96835cff4bf455876f330c3f7d}, intrahash = {c0c8b2e462fbddec0e4d32006df7974c}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, month = {November}, number = 11, pages = {1196-1202}, timestamp = {2024-04-08T10:44:01.000+0200}, title = {A 1 ns, 1 W, 2.5 V, 32 Kb NTL-CMOS SRAM macro using a memory cell with PMOS access transistors.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc30.html#OkamuraTTONTIKYY95}, volume = 30, year = 1995 }