%0 Conference Paper %1 conf/cicc/MathurKAAGWBTJZ22 %A Mathur, R. %A Kumar, M. %A Asthana, Vivek %A Aggarwal, S. %A Gupta, S. %A Wanjul, D. %A Baradia, A. %A Thota, S. %A Jain, P. %A Zheng, B. %A Cubeta, A. %A Thyagarajan, S. %A Chen, A. %A Chong, Y. K. %B CICC %D 2022 %I IEEE %K dblp %P 1-2 %T 5GHz SRAM for High-Performance Compute Platform in 5nm CMOS. %U http://dblp.uni-trier.de/db/conf/cicc/cicc2022.html#MathurKAAGWBTJZ22 %@ 978-1-6654-0756-4

@inproceedings{conf/cicc/MathurKAAGWBTJZ22, added-at = {2022-05-23T00:00:00.000+0200}, author = {Mathur, R. and Kumar, M. and Asthana, Vivek and Aggarwal, S. and Gupta, S. and Wanjul, D. and Baradia, A. and Thota, S. and Jain, P. and Zheng, B. and Cubeta, A. and Thyagarajan, S. and Chen, A. and Chong, Y. K.}, biburl = {https://www.bibsonomy.org/bibtex/27602d5e5ec6b8fce5704556fa2964430/dblp}, booktitle = {CICC}, crossref = {conf/cicc/2022}, ee = {https://doi.org/10.1109/CICC53496.2022.9772840}, interhash = {c30a8ffb531f8125e8bb5e48382c4bfb}, intrahash = {7602d5e5ec6b8fce5704556fa2964430}, isbn = {978-1-6654-0756-4}, keywords = {dblp}, pages = {1-2}, publisher = {IEEE}, timestamp = {2024-04-09T19:39:41.000+0200}, title = {5GHz SRAM for High-Performance Compute Platform in 5nm CMOS.}, url = {http://dblp.uni-trier.de/db/conf/cicc/cicc2022.html#MathurKAAGWBTJZ22}, year = 2022 }