%0 Conference Paper %1 conf/iscas/ItohTSNTM05 %A Itoh, Niichi %A Tsukamoto, Yasumasa %A Shibagaki, Takeshi %A Nii, Koji %A Takata, Hidehiro %A Makino, Hiroshi %B ISCAS (1) %D 2005 %I IEEE %K dblp %P 73-76 %T A 32×24-bit multiplier-accumulator with advanced rectangular styled Wallace-tree structure. %U http://dblp.uni-trier.de/db/conf/iscas/iscas2005-1.html#ItohTSNTM05 %@ 0-7803-8834-8

@inproceedings{conf/iscas/ItohTSNTM05, added-at = {2007-12-03T00:00:00.000+0100}, author = {Itoh, Niichi and Tsukamoto, Yasumasa and Shibagaki, Takeshi and Nii, Koji and Takata, Hidehiro and Makino, Hiroshi}, biburl = {https://www.bibsonomy.org/bibtex/239bd32d23e05a5d1d94c96c0b7c0c36b/dblp}, booktitle = {ISCAS (1)}, crossref = {conf/iscas/2005}, ee = {http://dx.doi.org/10.1109/ISCAS.2005.1464527}, interhash = {c7f29140bd17599e96b5b9e0535fd094}, intrahash = {39bd32d23e05a5d1d94c96c0b7c0c36b}, isbn = {0-7803-8834-8}, keywords = {dblp}, pages = {73-76}, publisher = {IEEE}, timestamp = {2016-05-21T12:01:14.000+0200}, title = {A 32×24-bit multiplier-accumulator with advanced rectangular styled Wallace-tree structure.}, url = {http://dblp.uni-trier.de/db/conf/iscas/iscas2005-1.html#ItohTSNTM05}, year = 2005 }