%0 Conference Paper %1 conf/ispass/LiM05 %A Li, Jian %A Martínez, José F. %B ISPASS %D 2005 %I IEEE Computer Society %K dblp %P 124-134 %T Power-Performance Implications of Thread-level Parallelism on Chip Multiprocessors. %U http://dblp.uni-trier.de/db/conf/ispass/ispass2005.html#LiM05 %@ 0-7803-8965-4

@inproceedings{conf/ispass/LiM05, added-at = {2023-03-24T00:00:00.000+0100}, author = {Li, Jian and Martínez, José F.}, biburl = {https://www.bibsonomy.org/bibtex/2decc85e1f20e7c15f9d53cc9de1c9fcd/dblp}, booktitle = {ISPASS}, crossref = {conf/ispass/2005}, ee = {https://doi.ieeecomputersociety.org/10.1109/ISPASS.2005.1430567}, interhash = {e4d8df5e1a072fb30ea0c5a553fa89b2}, intrahash = {decc85e1f20e7c15f9d53cc9de1c9fcd}, isbn = {0-7803-8965-4}, keywords = {dblp}, pages = {124-134}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T19:19:57.000+0200}, title = {Power-Performance Implications of Thread-level Parallelism on Chip Multiprocessors.}, url = {http://dblp.uni-trier.de/db/conf/ispass/ispass2005.html#LiM05}, year = 2005 }