%0 Conference Paper %1 conf/ic3i/KumarSMBTK22 %A Kumar, Keshav %A Singh, Vijay %A Mishra, Gaurav %A Babu, Bellam Ravindra %A Tripathi, Nandita %A Kumar, Pramod %B IC3I %D 2022 %I IEEE %K dblp %P 1634-1637 %T Power-Efficient Secured Hardware Design of AES Algorithm on High Performance FPGA. %U http://dblp.uni-trier.de/db/conf/ic3i/ic3i2022.html#KumarSMBTK22 %@ 979-8-3503-9826-7

@inproceedings{conf/ic3i/KumarSMBTK22, added-at = {2024-10-06T00:00:00.000+0200}, author = {Kumar, Keshav and Singh, Vijay and Mishra, Gaurav and Babu, Bellam Ravindra and Tripathi, Nandita and Kumar, Pramod}, biburl = {https://www.bibsonomy.org/bibtex/240c00056bc5be164952c036a7666c180/dblp}, booktitle = {IC3I}, crossref = {conf/ic3i/2022}, ee = {https://doi.org/10.1109/IC3I56241.2022.10073148}, interhash = {e9264b00057427cb2c7a0de014b56d52}, intrahash = {40c00056bc5be164952c036a7666c180}, isbn = {979-8-3503-9826-7}, keywords = {dblp}, pages = {1634-1637}, publisher = {IEEE}, timestamp = {2024-10-07T09:53:27.000+0200}, title = {Power-Efficient Secured Hardware Design of AES Algorithm on High Performance FPGA.}, url = {http://dblp.uni-trier.de/db/conf/ic3i/ic3i2022.html#KumarSMBTK22}, year = 2022 }