%0 Conference Paper %1 conf/glvlsi/RathoreCS16 %A Rathore, Vijeta %A Chaturvedi, Vivek %A Srikanthan, Thambipillai %B ACM Great Lakes Symposium on VLSI %D 2016 %E Coskun, Ayse K. %E Margala, Martin %E Behjat, Laleh %E Han, Jie %I ACM %K dblp %P 377-380 %T Performance Constraint-Aware Task Mapping to Optimize Lifetime Reliability of Manycore Systems. %U http://dblp.uni-trier.de/db/conf/glvlsi/glvlsi2016.html#RathoreCS16 %@ 978-1-4503-4274-2

@inproceedings{conf/glvlsi/RathoreCS16, added-at = {2019-10-19T00:00:00.000+0200}, author = {Rathore, Vijeta and Chaturvedi, Vivek and Srikanthan, Thambipillai}, biburl = {https://www.bibsonomy.org/bibtex/2da66071812a10c8a21c7687eb734f134/dblp}, booktitle = {ACM Great Lakes Symposium on VLSI}, crossref = {conf/glvlsi/2016}, editor = {Coskun, Ayse K. and Margala, Martin and Behjat, Laleh and Han, Jie}, ee = {https://doi.org/10.1145/2902961.2902996}, interhash = {edb33fbb09125dcc784555a47aa69063}, intrahash = {da66071812a10c8a21c7687eb734f134}, isbn = {978-1-4503-4274-2}, keywords = {dblp}, pages = {377-380}, publisher = {ACM}, timestamp = {2024-04-09T22:51:45.000+0200}, title = {Performance Constraint-Aware Task Mapping to Optimize Lifetime Reliability of Manycore Systems.}, url = {http://dblp.uni-trier.de/db/conf/glvlsi/glvlsi2016.html#RathoreCS16}, year = 2016 }