%0 Conference Paper %1 conf/islped/HwangJR07 %A Hwang, Myeong-Eun %A Jung, Seong-Ook %A Roy, Kaushik %B ISLPED %D 2007 %E Marculescu, Diana %E Raghunathan, Anand %E Keshavarzi, Ali %E Narayanan, Vijaykrishnan %I ACM %K dblp %P 387-390 %T Slope interconnect effort: gate-interconnect interdependentdelay model for CMOS logic gates. %U http://dblp.uni-trier.de/db/conf/islped/islped2007.html#HwangJR07 %@ 978-1-59593-709-4

@inproceedings{conf/islped/HwangJR07, added-at = {2018-11-06T00:00:00.000+0100}, author = {Hwang, Myeong-Eun and Jung, Seong-Ook and Roy, Kaushik}, biburl = {https://www.bibsonomy.org/bibtex/20233331c919939f51f527535b57949da/dblp}, booktitle = {ISLPED}, crossref = {conf/islped/2007}, editor = {Marculescu, Diana and Raghunathan, Anand and Keshavarzi, Ali and Narayanan, Vijaykrishnan}, ee = {https://doi.org/10.1145/1283780.1283865}, interhash = {ee22cc59e9744a73739104aa4de687d6}, intrahash = {0233331c919939f51f527535b57949da}, isbn = {978-1-59593-709-4}, keywords = {dblp}, pages = {387-390}, publisher = {ACM}, timestamp = {2018-11-07T16:24:59.000+0100}, title = {Slope interconnect effort: gate-interconnect interdependentdelay model for CMOS logic gates.}, url = {http://dblp.uni-trier.de/db/conf/islped/islped2007.html#HwangJR07}, year = 2007 }