%0 Book Section %1 citeulike:6502830 %A Vogel, Christian %B Analog Circuit Design %D 2010 %E Roermund, Arthur H. M. %E Casier, Herman %E Steyaert, Michiel %K adcs, architecture, calibration, converters, discrete_time_model, frequency_response, interleaved, signal_processing %P 61--78 %T A Signal Processing View on Time-Interleaved ADCs %U http://dx.doi.org/10.1007/978-90-481-3083-2_4 %X The idea of time-interleaved ADCs (TI-ADCs) is old, but it took more than 25 years until the requirements on converters and the possibility of advanced digital post correction made this architecture attractive. We investigate time-interleaved ADCs with a focus on the involved signal processing. By establishing a discrete-time model of a TI-ADC, we explicitly show that a TI-ADC with mismatches is a time-varying system producing spurious images. This view will help to understand the principles of digital calibration of linear mismatches in TI-ADCs. Currently, time offset mismatches are investigated most extensively. Therefore, we will primarily discuss digital calibration of time offset mismatches, but will generalize the results to frequency response mismatches whenever possible. %& 4

@incollection{citeulike:6502830, abstract = {The idea of time-interleaved ADCs (TI-ADCs) is old, but it took more than 25 years until the requirements on converters and the possibility of advanced digital post correction made this architecture attractive. We investigate time-interleaved ADCs with a focus on the involved signal processing. By establishing a discrete-time model of a TI-ADC, we explicitly show that a TI-ADC with mismatches is a time-varying system producing spurious images. This view will help to understand the principles of digital calibration of linear mismatches in TI-ADCs. Currently, time offset mismatches are investigated most extensively. Therefore, we will primarily discuss digital calibration of time offset mismatches, but will generalize the results to frequency response mismatches whenever possible.}, added-at = {2010-01-08T09:20:34.000+0100}, author = {Vogel, Christian}, biburl = {https://www.bibsonomy.org/bibtex/2504bdb71bc59dfc2c848e502d8a069bf/peteru}, booktitle = {Analog Circuit Design}, chapter = 4, editor = {Roermund, Arthur H. M. and Casier, Herman and Steyaert, Michiel}, interhash = {faddb27bc28d00cfafdee8014dd52a0d}, intrahash = {504bdb71bc59dfc2c848e502d8a069bf}, keywords = {adcs, architecture, calibration, converters, discrete_time_model, frequency_response, interleaved, signal_processing}, pages = {61--78}, timestamp = {2010-01-08T09:20:34.000+0100}, title = {A Signal Processing View on Time-Interleaved ADCs}, url = {http://dx.doi.org/10.1007/978-90-481-3083-2_4}, year = 2010 }