%0 Conference Paper %1 conf/iscas/UchidaIOSA02 %A Uchida, Yoshihiro %A Ise, Masanao %A Onoye, Takao %A Shirakawa, Isao %A Arungsrisangchai, Itthichai %B ISCAS (3) %D 2002 %I IEEE %K dblp %P 269-272 %T VLSI architecture of digital matched filter and prime interleaver for W-CDMA. %U http://dblp.uni-trier.de/db/conf/iscas/iscas2002-3.html#UchidaIOSA02 %@ 0-7803-7448-7

@inproceedings{conf/iscas/UchidaIOSA02, added-at = {2016-05-20T00:00:00.000+0200}, author = {Uchida, Yoshihiro and Ise, Masanao and Onoye, Takao and Shirakawa, Isao and Arungsrisangchai, Itthichai}, biburl = {https://www.bibsonomy.org/bibtex/2e6d851243e366e3e62d0ade2d456f43b/dblp}, booktitle = {ISCAS (3)}, crossref = {conf/iscas/2002}, ee = {http://dx.doi.org/10.1109/ISCAS.2002.1010212}, interhash = {fb6b684450bf7653daea765638d7326a}, intrahash = {e6d851243e366e3e62d0ade2d456f43b}, isbn = {0-7803-7448-7}, keywords = {dblp}, pages = {269-272}, publisher = {IEEE}, timestamp = {2016-05-21T12:03:45.000+0200}, title = {VLSI architecture of digital matched filter and prime interleaver for W-CDMA.}, url = {http://dblp.uni-trier.de/db/conf/iscas/iscas2002-3.html#UchidaIOSA02}, year = 2002 }