%0 Conference Paper %1 conf/vdat/PrajapatiYPS14 %A Prajapati, Ekta %A Yadav, Nandakishor %A Pattanaik, Manisha %A Sharma, G. K. %B VDAT %D 2014 %I IEEE %K dblp %P 1-6 %T Operation-aware assist circuit design for improved write performance of FinFET based SRAM. %U http://dblp.uni-trier.de/db/conf/vdat/vdat2014.html#PrajapatiYPS14 %@ 978-1-4799-5088-1

@inproceedings{conf/vdat/PrajapatiYPS14, added-at = {2019-07-17T00:00:00.000+0200}, author = {Prajapati, Ekta and Yadav, Nandakishor and Pattanaik, Manisha and Sharma, G. K.}, biburl = {https://www.bibsonomy.org/bibtex/29bae039dd9b954d89165d742477b4a05/dblp}, booktitle = {VDAT}, crossref = {conf/vdat/2014}, ee = {https://doi.org/10.1109/ISVDAT.2014.6881063}, interhash = {fc0379149fd06f24f056b1740db3e6d9}, intrahash = {9bae039dd9b954d89165d742477b4a05}, isbn = {978-1-4799-5088-1}, keywords = {dblp}, pages = {1-6}, publisher = {IEEE}, timestamp = {2019-07-18T11:41:05.000+0200}, title = {Operation-aware assist circuit design for improved write performance of FinFET based SRAM.}, url = {http://dblp.uni-trier.de/db/conf/vdat/vdat2014.html#PrajapatiYPS14}, year = 2014 }