%0 Thesis %1 phd/ndltd/Silveira94 %A Silveira, Luís Miguel %D 1994 %K dblp %T Model order reduction techniques for circuit simulation.

@phdthesis{phd/ndltd/Silveira94, added-at = {2022-05-04T00:00:00.000+0200}, author = {Silveira, Luís Miguel}, biburl = {https://www.bibsonomy.org/bibtex/2919b29a28eacee4fd29518de42abab23/dblp}, ee = {https://hdl.handle.net/1721.1/36451}, interhash = {fc57667bb7b133cacce7d34253083efe}, intrahash = {919b29a28eacee4fd29518de42abab23}, keywords = {dblp}, note = {ndltd.org (oai:dspace.mit.edu:1721.1/36451)}, school = {Massachusetts Institute of Technology, Cambridge, MA, USA}, timestamp = {2024-04-09T08:06:29.000+0200}, title = {Model order reduction techniques for circuit simulation.}, year = 1994 }