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RAWAtten: Reconfigurable Accelerator for Window Attention in Hierarchical Vision Transformers.

, , and . DATE, page 1-6. IEEE, (2023)

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A Runtime Reconfigurable Design of Compute-in-Memory based Hardware Accelerator., , , , and . DATE, page 932-937. IEEE, (2021)RAWAtten: Reconfigurable Accelerator for Window Attention in Hierarchical Vision Transformers., , and . DATE, page 1-6. IEEE, (2023)Benchmark Non-volatile and Volatile Memory Based Hybrid Precision Synapses for In-situ Deep Neural Network Training., and . ASP-DAC, page 422-427. IEEE, (2020)Energy-efficient On-chip Deep Neural Network (DNN) Inference and Training with Emerging Non-volatile Memory Technologies.. Georgia Institute of Technology, Atlanta, GA, USA, (2024)base-search.net (ftgeorgiatech:oai:repository.gatech.edu:1853/75066).Robot Chain Based Self-organizing Search Method of Swarm Robotics., , , , , and . ICIC (1), volume 10954 of Lecture Notes in Computer Science, page 136-146. Springer, (2018)A Runtime Reconfigurable Design of Compute-in-Memory-Based Hardware Accelerator for Deep Learning Inference., , , , and . ACM Trans. Design Autom. Electr. Syst., 26 (6): 45:1-45:18 (2021)A Variation Robust Inference Engine Based on STT-MRAM with Parallel Read-Out., , , , , , , and . ISCAS, page 1-5. IEEE, (2020)MLP+NeuroSimV3.0: Improving On-chip Learning Performance with Device to Algorithm Optimizations., , and . ICONS, page 1:1-1:7. ACM, (2019)Performance Benchmarking of Spin-Orbit Torque Magnetic RAM (SOT-MRAM) for Deep Neural Network (DNN) Accelerators., , , , , , , , and . IMW, page 1-4. IEEE, (2022)A FeRAM based Volatile/Non-volatile Dual-mode Buffer Memory for Deep Neural Network Training., , and . DATE, page 1871-1876. IEEE, (2021)