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Designing a configurable IEEE-compliant FPU that supports variable precision for soft processors.

, , , , , и . FCCM, стр. 202. IEEE, (2023)

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The routability of multiprocessor network topologies in FPGAs., , и . SLIP, стр. 49-56. ACM, (2006)An on-chip testbed that emulates runtime traffic and reduces design verification time for FPGA designs., и . FPT, стр. 361-364. IEEE, (2008)A Multiprocessor System-on-Chip Implementation of a Laser-based Transparency Meter on an FPGA., , , и . FPT, стр. 373-376. IEEE, (2007)A methodology for identifying and placing heterogeneous cluster groups based on placement proximity data (abstract only)., , и . FPGA, стр. 242. ACM, (2014)Using reconfigurability to achieve real-time profiling for hardware/software codesign., и . FPGA, стр. 190-199. ACM, (2004)Boosting Multiple Multipliers Packing on FPGA DSP Blocks via Truncation and Compensation-based Approximation., , , и . ISVLSI, стр. 222-227. IEEE, (2024)Standardizing the Performance Assessment of Reconfigurable Processor Architectures., и . FCCM, стр. 282-283. IEEE Computer Society, (2003)Designing an IEEE-Compliant FPU that Supports Configurable Precision for Soft Processors., , , , , и . ACM Trans. Reconfigurable Technol. Syst., 17 (2): 33:1-33:32 (июня 2024)Analyzing System-Level Information's Correlation to FPGA Placement., , , и . ACM Trans. Reconfigurable Technol. Syst., 6 (3): 15:1-15:21 (2013)Automated Verilog Assertion Generation Using Fine-Tuned LLMs with Subtask-Specific Iterative Prompting., , , и . ISQED, стр. 1-7. IEEE, (2025)