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Disambiguation of "Vemuri, Ranga"

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A Methodology for Automated Verification of Synthesized RTL Designs and Its Integration with a High-Level Synthesis Tool.

, and . FMCAD, volume 1522 of Lecture Notes in Computer Science, page 204-221. Springer, (1998)

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Janki Rangatia

Sripriya Rangarajan

Kiril Rangatscheff

Hiranmayi Ranganathan

Palani Murugan Rangasamy

 

Other publications of authors with the same name

Simulation based architectural power estimation for PLA-based controllers., and . ISLPED, page 121-124. IEEE, (1996)Accuracy driven performance macromodeling of feasible regions during synthesis of analog circuits., , and . ACM Great Lakes Symposium on VLSI, page 482-487. ACM, (2005)LiPaR: A light-weight parallel router for FPGA-based networks-on-chip., , , and . ACM Great Lakes Symposium on VLSI, page 452-457. ACM, (2005)Moment-driven coupling-aware routing methodology., and . ACM Great Lakes Symposium on VLSI, page 390-395. ACM, (2005)Scheduling for low power under resource and latency constraints., and . ISCAS, page 53-56. IEEE, (2000)Analysis of the Satisfiability Attack Against Logic Encryption Using Synthetic Benchmarks., , and . iSES, page 445-450. IEEE, (2022)SoC Trust Validation Using Assertion-Based Security Monitors., , , and . ISQED, page 496-503. IEEE, (2021)Improving the Schedule Quality of Static-List Time-Constrained Scheduling., and . DATE, page 749. IEEE Computer Society / ACM, (2000)On the verification of synthesized designs using automatically generated transformational witnesses., , and . DATE, page 798. IEEE Computer Society, (2001)CAD Tools for a Globally Asynchronous Locally Synchronous FPGA Architecture., and . VLSI Design, page 251-256. IEEE Computer Society, (2006)