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Disambiguation of "Ayala, José Luis"

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Energy impact in the design space exploration of loop buffer schemes in embedded systems.

, , , , and . VLSI-SoC, page 216-221. IEEE, (2013)

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José Luis Morote

José Luis Rivarola

José Luis Narro

Luis José Garcés

José Luis Goity

 

Other publications of authors with the same name

Combined Dynamic-Static Approach for Thermal-Awareness in Heterogeneous Data Centers., , , , and . IWIA, page 75-82. IEEE, (2010)Leakage and temperature aware server control for improving energy efficiency in data centers., , , , , and . DATE, page 266-269. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Leakage Energy Reduction in Banked Content Addressable Memories., , and . ICECS, page 1196-1199. IEEE, (2006)CEDA Currents.. IEEE Des. Test, 34 (6): 123-124 (2017)A study on the parallelization of moeas to predict the patient's response to the onabotulinumtoxina treatment., , and . SummerSim, page 24:1-24:12. ACM, (2019)Run-time self-tuning banked loop buffer architecture for power optimization of dynamic workload applications., , , , and . VLSI-SoC, page 136-141. IEEE, (2011)Power estimation and power optimization policies for processor-based systems.. Technical University of Madrid, Spain, (2005)Thermal Characterization and Thermal Management in Processor-Based Systems., , , , and . Power-aware Computing Systems, volume 07041 of Dagstuhl Seminar Proceedings, Internationales Begegnungs- und Forschungszentrum fuer Informatik (IBFI), Schloss Dagstuhl, Germany, (2007)Unsupervised power modeling of co-allocated workloads for energy efficiency in data centers., , , , and . DATE, page 1345-1350. IEEE, (2016)Analysis of the Thermal Impact of Source-Code Transformations in Embedded-Processors., , and . ICECS, page 866-869. IEEE, (2006)