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Hardware Organization of a Low Level Parallel Processor., , , and . IFIP Congress, page 855-860. (1977)Performance Evaluation and Improvement of a Dynamically Microprogrammable Computer with Low-Level Parallelism., , , , and . IFIP Congress, page 181-186. (1980)Simulating realistic force and shape of virtual cloth with adaptive meshes and its parallel implementation in OpenMP., , , , , and . Parallel and Distributed Computing and Networks, page 386-391. IASTED/ACTA Press, (2004)A Web-Based Education Tool for Collaborative Learning of Assembly Programming., and . ICWI, page 703-710. IADIS, (2003)A parallel processor system for three-dimensional color graphics., , , , and . SIGGRAPH, page 67-76. ACM, (1984)General mapping of feed-forward neural networks onto an MIMD computer., , , and . ICNN, page 1048-1053. IEEE, (1995)Improvement of message communication in concurrent logic language., , , , , and . PASCO, page 156-164. ACM, (1997)Low-Complexity Bypass Network Using Small RAM., , , , , and . CDES, page 153-159. CSREA Press, (2008)Efficient Goal Scheduling in Concurrent Logic Language using Type-Based Dependency Analysis., , , , , and . ASIAN, volume 1345 of Lecture Notes in Computer Science, page 268-282. Springer, (1997)A Technique to Eliminate Redundant Inter-Processor Communication on Parallelizing Compiler TINPAR., , , , , , and . Int. J. Parallel Program., 27 (2): 97-109 (1999)