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13% Power reduction in 16b integer unit in 40nm CMOS by adaptive power supply voltage control with parity-based error prediction and detection (PEPD) and fully integrated digital LDO.

, , , , , , , and . ISSCC, page 486-488. IEEE, (2012)

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A closed-form expression for estimating minimum operating voltage (VDDmin) of CMOS logic gates., , , , , , and . DAC, page 984-989. ACM, (2011)Effect of resistance of TSV's on performance of boost converter for low power 3D SSD with NAND flash memories., , , , , , and . 3DIC, page 1-4. IEEE, (2009)A 1.8V 30nJ adaptive program-voltage (20V) generator for 3D-integrated NAND flash SSD., , , , , , and . ISSCC, page 238-239. IEEE, (2009)Inductor design of 20-V boost converter for low power 3D solid state drive with NAND flash memories., , , , , , and . ISLPED, page 87-92. ACM, (2009)12% Power reduction by within-functional-block fine-grained adaptive dual supply voltage control in logic circuits with 42 voltage domains., , , , , and . ESSCIRC, page 191-194. IEEE, (2011)A stretchable EMI measurement sheet with 8×8 coil array, 2V organic CMOS decoder, and -70dBm EMI detection circuits in 0.18¼m CMOS., , , , , , , , , and . ISSCC, page 472-473. IEEE, (2009)A 512Gb 3b/Cell 3D flash memory on a 96-word-line-layer technology., , , , , , , , , and 54 other author(s). ISSCC, page 336-338. IEEE, (2018)24% Power reduction by post-fabrication dual supply voltage control of 64 voltage domains in VDDmin limited ultra low voltage logic circuits., , , , , , , , , and 2 other author(s). ISQED, page 586-591. IEEE, (2012)13% Power reduction in 16b integer unit in 40nm CMOS by adaptive power supply voltage control with parity-based error prediction and detection (PEPD) and fully integrated digital LDO., , , , , , , and . ISSCC, page 486-488. IEEE, (2012)12.7-times energy efficiency increase of 16-bit integer unit by power supply voltage (VDD) scaling from 1.2v to 310mv enabled by contention-less flip-flops (CLFF) and separated VDD between flip-flops and combinational logics., , , , , , and . ISLPED, page 163-168. IEEE/ACM, (2011)