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Techniques for modulating error resilience in emerging multi-value technologies.

, , , , and . Conf. Computing Frontiers, page 55-63. ACM, (2016)

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Power-Efficient Computer Architectures: Recent Advances, , and . Synthesis Lectures on Computer Architecture Morgan & Claypool Publishers, (2014)Efficient invisible speculative execution through selective delay and value prediction., , , , and . ISCA, page 723-735. ACM, (2019)Double Throughput Multiply-Accumulate unit for FlexCore processor enhancements., , and . IPDPS, page 1-7. IEEE, (2009)STIFF: thermally safe temperature effect inversion aware FinFET based multi-core., , and . CF, page 21-29. ACM, (2022)Architecting Selective Refresh based Multi-Retention Cache for Heterogeneous System (ARMOUR)., , and . DAC, page 1-6. IEEE, (2023)A High-Speed, Energy-Efficient Two-Cycle Multiply-Accumulate (MAC) Architecture and Its Application to a Double-Throughput MAC Unit., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 57-I (12): 3073-3081 (2010)A low-leakage twin-precision multiplier using reconfigurable power gating., , , and . ISCAS (2), page 1654-1657. IEEE, (2005)Ghost loads: what is the cost of invisible speculation?, , , , , and . CF, page 153-163. ACM, (2019)A tunable cache for approximate computing., , and . NANOARCH, page 88-89. IEEE Computer Society/ACM, (2014)Design space exploration for an embedded processor with flexible datapath interconnect., , , , , and . ASAP, page 55-62. IEEE Computer Society, (2010)