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Другие публикации лиц с тем же именем

On state reduction of incompletely specified finite state machines., и . Comput. Electr. Eng., 33 (1): 58-69 (2007)Oscillation and sequential behavior caused by opens in the routing in digital CMOS circuits., и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 17 (11): 1200-1210 (1998)Extraction and Simulation of Realistic CMOS Faults Using Inductive Fault Analysis., и . ITC, стр. 475-484. IEEE Computer Society, (1988)Carafe: an inductive fault analysis tool for CMOS VLSI circuits., и . VTS, стр. 92-98. IEEE Computer Society, (1993)Physical design for testability for bridges in CMOS circuits.. VTS, стр. 290-295. IEEE Computer Society, (1993)A methodolgy for characterizing cell testability., и . VTS, стр. 384-390. IEEE Computer Society, (1997)Using Temporal Constraints for Eliminating Crosstalk Candidates for Design and Test., и . VTS, стр. 80-85. IEEE Computer Society, (1999)A Systematic DFT Procedure for Library Cells., , и . VTS, стр. 460-466. IEEE Computer Society, (1999)Oscillation and Sequential Behavior Caused by Interconnect Opens in Digital CMOS Circuits., и . ITC, стр. 597-606. IEEE Computer Society, (1997)Detection of Multiple Faults in Two-Dimensional ILAs., и . IEEE Trans. Computers, 45 (6): 741-746 (1996)