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Disambiguation of "Peng, Xiaochen"

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XOR-CIM: Compute-In-Memory SRAM Architecture with Embedded XOR Encryption.

, , , , and . ICCAD, page 77:1-77:6. IEEE, (2020)

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Xiaochen Hu

Xiaochen Lian

Changgeng Peng

Xiao-Wei Peng

Jianqiang Peng

 

Other publications of authors with the same name

NeuroSim Validation with 40nm RRAM Compute-in-Memory Macro., , , , and . AICAS, page 1-4. IEEE, (2021)Compute-in-RRAM with Limited On-chip Resources., , and . AICAS, page 1-4. IEEE, (2021)Architectural Design of 3D NAND Flash based Compute-in-Memory for Inference Engine., , , and . MEMSYS, page 77-85. ACM, (2020)Benchmark of RRAM based Architectures for Dot-Product Computation., and . APCCAS, page 378-381. IEEE, (2018)A Two-way SRAM Array based Accelerator for Deep Neural Network On-chip Training., , , , , , , , , and . DAC, page 1-6. IEEE, (2020)Design Considerations of Selector Device in Cross-Point RRAM Array for Neuromorphic Computing., , and . ISCAS, page 1-4. IEEE, (2018)Compute-in-Memory with Emerging Nonvolatile-Memories: Challenges and Prospects., , , and . CICC, page 1-4. IEEE, (2020)DNN+NeuroSim V2.0: An End-to-End Benchmarking Framework for Compute-in-Memory Accelerators for On-chip Training., , , , and . CoRR, (2020)DNN+NeuroSim V2.0: An End-to-End Benchmarking Framework for Compute-in-Memory Accelerators for On-Chip Training., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 40 (11): 2306-2319 (2021)NeuroSim Simulator for Compute-in-Memory Hardware Accelerator: Validation and Benchmark., , , , and . Frontiers Artif. Intell., (2021)