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Disambiguation of "Tehranipoor, Mohammad"

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CTX: A Clock-Gating-Based Test Relaxation and X-Filling Scheme for Reducing Yield Loss Risk in At-Speed Scan Testing.

, , , , , , , and . ATS, page 397-402. IEEE Computer Society, (2008)

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Mohammad Mohammad

Mohammad Sadeghi

Metallogenic modeling and mineral potential mapping in the Takab district, NW Iran. Uni Halle-Wittenberg, (2009)

Mohammad Reza Mohammad Khorasani

Mohammad Mehrjouei

Mohammad Djassemi

 

Other publications of authors with the same name

Case Study: Efficient SDD test generation for very large integrated circuits., , , , and . VTS, page 78-83. IEEE Computer Society, (2011)TSUNAMI: a light-weight on-chip structure for measuring timing uncertainty induced by noise during functional and test operations., and . ACM Great Lakes Symposium on VLSI, page 183-188. ACM, (2012)A new hybrid FPGA with nanoscale clusters and CMOS routing., and . DAC, page 727-730. ACM, (2006)Trustworthy Hardware: Identifying and Classifying Hardware Trojans., , , and . Computer, 43 (10): 39-46 (2010)Enhanced launch-off-capture transition fault testing., , and . ITC, page 10. IEEE Computer Society, (2005)Analysis of power consumption and transition fault coverage for LOS and LOC testing schemes., , , , , , , , , and . DDECS, page 376-381. IEEE Computer Society, (2010)Layout-Aware, IR-Drop Tolerant Transition Fault Pattern Generation., , , and . DATE, page 1172-1177. ACM, (2008)Critical Paths Selection and Test Cost Reduction Considering Process Variations., and . Asian Test Symposium, page 259-264. IEEE Computer Society, (2013)Defect Tolerance for Molecular Electronics-Based NanoFabrics Using Built-In Self-Test Procedure.. DFT, page 305-313. IEEE Computer Society, (2005)Securing Scan Design Using Lock and Key Technique., , , and . DFT, page 51-62. IEEE Computer Society, (2005)