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SAPOR: second-order Arnoldi method for passive order reduction of RCS circuits.

Y. Su, J. Wang, X. Zeng, Z. Bai, C. Chiang, и D. Zhou. ICCAD, стр. 74-79. IEEE Computer Society / ACM, (2004)

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Su Zhao

Qi Su

Mingxia Su

Hua Su

Ping Su

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Multi-Corner Parametric Yield Estimation via Bayesian Inference on Bernoulli Distribution with Conjugate Prior.J. Shi, Z. Gao, J. Tao, Y. Su, D. Zhou, и X. Zeng. ISCAS, стр. 1-4. IEEE, (2020)Efficient Performance Trade-off Modeling for Analog Circuit based on Bayesian Neural Network.Z. Gao, J. Tao, F. Yang, Y. Su, D. Zhou, и X. Zeng. ICCAD, стр. 1-8. ACM, (2019)Learning Sparse Patterns in Deep Neural Networks.W. Wen, F. Yang, Y. Su, D. Zhou, и X. Zeng. ASICON, стр. 1-4. IEEE, (2019)Correlated Rare Failure Analysis via Asymptotic Probability Evaluation.J. Tao, H. Yu, Y. Su, D. Zhou, X. Zeng, и X. Li. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 41 (4): 813-826 (2022)Analog/RF Post-silicon Tuning via Bayesian Optimization.R. Pan, J. Tao, Y. Su, D. Zhou, X. Zeng, и X. Li. ACM Trans. Design Autom. Electr. Syst., 25 (1): 7:1-7:17 (2020)Graph-Constrained Sparse Performance Modeling for Analog Circuit Optimization via SDP Relaxation.J. Tao, Y. Su, D. Zhou, X. Zeng, и X. Li. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 38 (8): 1385-1398 (2019)Fast compressive sensing reconstruction algorithm on FPGA using Orthogonal Matching Pursuit.Z. Yu, J. Su, F. Yang, Y. Su, X. Zeng, D. Zhou, и W. Shi. ISCAS, стр. 249-252. IEEE, (2016)VTSMOC: An Efficient Voronoi Tree Search Boosted Multiobjective Bayesian Optimization With Constraints for High-Dimensional Analog Circuit Synthesis.A. Zhao, R. Lyu, X. Zhao, Z. Bi, F. Yang, C. Yan, D. Zhou, Y. Su, и X. Zeng. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 44 (3): 818-831 (марта 2025)Efficient Hybrid Performance Modeling for Analog Circuits Using Hierarchical Shrinkage Priors.C. Liao, J. Tao, H. Yu, Z. Tang, Y. Su, D. Zhou, X. Zeng, и X. Li. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 35 (12): 2148-2152 (2016)Smart-MSP: A Self-Adaptive Multiple Starting Point Optimization Approach for Analog Circuit Synthesis.Y. Yang, H. Zhu, Z. Bi, C. Yan, D. Zhou, Y. Su, и X. Zeng. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 37 (3): 531-544 (2018)

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