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Disambiguation of "Maurine, Philippe"

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Evaluation on FPGA of triple rail logic robustness against DPA and DEMA.

, , , , , and . DATE, page 634-639. IEEE, (2009)

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Philippe Kersting

Philippe Bopp

Philippe Zysset

Philippe Dreuw

Philippe Moisan

 

Other publications of authors with the same name

Method for evaluation of transient-fault detection techniques., , , , and . Microelectron. Reliab., (2017)Circuit sizing method under delay constraint., , , and . ISCAS, IEEE, (2006)Security evaluation of dual rail logic against DPA attacks., , , and . VLSI-SoC, page 181-186. IEEE, (2006)Gate Sizing for Low Power Design., , and . VLSI-SOC, volume 218 of IFIP Conference Proceedings, page 301-312. Kluwer, (2001)Interest of MIA in frequency domain?, , , and . CS2@HiPEAC, page 35-38. ACM, (2015)Checking Robustness Against EM Side-Channel Attacks Prior to Manufacturing., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 41 (5): 1264-1275 (2022)Near-Field Mapping System to Scan in Time Domain the Magnetic Emissions of Integrated Circuits., , , , and . PATMOS, volume 5349 of Lecture Notes in Computer Science, page 229-236. Springer, (2008)A GALS pipeline DES architecture to increase robustness against DPA and DEMA attacks., , , , , and . SBCCI, page 115-120. ACM, (2010)Techniques for EM Fault Injection: Equipments and Experimental Results.. FDTC, page 3-4. IEEE Computer Society, (2012)Setup and Hold Timing Violations Induced by Process Variations, in a Digital Multiplier., , , , , , and . ISVLSI, page 316-321. IEEE Computer Society, (2008)