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Disambiguation of "Decoutere, Stefaan"

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Implementation of plug-and-play ESD protection in 5.5GHz 90nm RF CMOS LNAs - Concepts, constraints and solutions.

, , , , , , , , and . Microelectron. Reliab., 46 (5-6): 702-712 (2006)

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Lies Decoutere

Stefaan Bergé

Stefaan Haspeslagh

Stefaan Lecleir

Stefaan De Neve

 

Other publications of authors with the same name

A 5-GHz fully integrated ESD-protected low-noise amplifier in 90-nm RF CMOS., , , , , , , , , and . IEEE J. Solid State Circuits, 40 (7): 1434-1442 (2005)Time dependent dielectric breakdown (TDDB) evaluation of PE-ALD SiN gate dielectrics on AlGaN/GaN recessed gate D-mode MIS-HEMTs and E-mode MIS-FETs., , , , , , , , and . IRPS, page 6. IEEE, (2015)Demonstration of Bilayer Gate Insulator for Improved Reliability in GaN-on-Si Vertical Transistors., , , , , , , , , and . IRPS, page 1-5. IEEE, (2020)Technologies for (sub-) 45nm Analog/RF CMOS - Circuit Design Opportunities and Challenges., , , , and . CICC, page 679-686. IEEE, (2006)Trapping and reliability issues in GaN-based MIS HEMTs with partially recessed gate., , , , , , , , , and . Microelectron. Reliab., (2016)High- Temperature PBTI in Trench-Gate Vertical GaN Power MOSFETs: Role of Border and Semiconductor Traps., , , , , , , , , and 1 other author(s). IRPS, page 1-6. IEEE, (2023)Influence of Drain and Gate Potential on Gate Failure in Semi-Vertical GaN-on-Si Trench MOSFETs., , , , , , , , , and 1 other author(s). IRPS, page 20-1. IEEE, (2022)Gate Reliability of p-GaN Power HEMTs Under Pulsed Stress Condition., , , , , , , and . IRPS, page 10. IEEE, (2022)Breakdown investigation in GaN-based MIS-HEMT devices., , , , , , , , , and 2 other author(s). ESSDERC, page 377-380. IEEE, (2014)A 328 μW 5 GHz voltage-controlled oscillator in 90 nm CMOS with high-quality thin-film post-processed inductor., , , , , , , , , and 3 other author(s). CICC, page 701-704. IEEE, (2004)