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Disambiguation of "Suresh, Vikram B."

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A 4900×m2 839Mbps Side-Channel Attack Resistant AES-128 in 14nm CMOS with Heterogeneous Sboxes, Linear Masked MixColumns and Dual-Rail Key Addition.

, , , , , , , , , , , and . VLSI Circuits, page 234-. IEEE, (2019)

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Vikram Mehta

Vikram Menon

Vikram Mavalankar

Suresh Merchant

Suresh Duggal

 

Other publications of authors with the same name

A 7-Gbps SCA-Resistant Multiplicative-Masked AES Engine in Intel 4 CMOS., , , , , , , and . IEEE J. Solid State Circuits, 58 (4): 1106-1116 (2023)340 mV-1.1 V, 289 Gbps/W, 2090-Gate NanoAES Hardware Accelerator With Area-Optimized Encrypt/Decrypt GF(2 4 ) 2 Polynomials in 22 nm Tri-Gate CMOS., , , , , , , , and . IEEE J. Solid State Circuits, 50 (4): 1048-1058 (2015)Managing test coverage uncertainty due to thermal noise in nano-CMOS: A case-study on an SRAM array., and . ICCD, page 201-206. IEEE Computer Society, (2013)Entropy Extraction in Metastability-based TRNG., and . HOST, page 135-140. IEEE Computer Society, (2010)On-chip lightweight implementation of reduced NIST randomness test suite., , and . HOST, page 93-98. IEEE Computer Society, (2013)340mV-1.1V, 289Gbps/W, 2090-gate NanoAES hardware accelerator with area-optimized encrypt/decrypt GF(24)2 polynomials in 22nm tri-gate CMOS., , , , , , , , and . VLSIC, page 1-2. IEEE, (2014)A 4fJ/bit delay-hardened physically unclonable function circuit with selective bit destabilization in 14nm tri-gate CMOS., , , , , , , , , and . VLSI Circuits, page 1-2. IEEE, (2016)220MV-900MV 794/584/754 GBPS/W Reconfigurable GF(24)2 AES/SMS4/Camellia Symmetric-Key Cipher Accelerator in 14NM Tri-Gate CMOS., , , , , , , and . VLSI Circuits, page 175-176. IEEE, (2018)2.9TOPS/W Reconfigurable Dense/Sparse Matrix-Multiply Accelerator with Unified INT8/INTI6/FP16 Datapath in 14NM Tri-Gate CMOS., , , , , , , and . VLSI Circuits, page 39-40. IEEE, (2018)A 0.26% BER, 1028 Challenge-Response Machine-Learning Resistant Strong-PUF in 14nm CMOS Featuring Stability-Aware Adversarial Challenge Selection., , , , , and . VLSI Circuits, page 1-2. IEEE, (2020)