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A Near Optimal Adaptive Row Modular Design for Efficiently Reconfiguring the Processor Array in VLSI., и . ICPP (1), стр. 261-265. Pennsylvania State University Press, (1989)Robust Design-for-Security Architecture for Enabling Trust in IC Manufacturing and Test., , и . IEEE Trans. Very Large Scale Integr. Syst., 26 (5): 818-830 (2018)Low-power domino circuits using NMOS pull-up on off-critical paths., , , и . ASP-DAC, стр. 533-538. ACM Press, (2005)A differential built-in current sensor design for high-speed IDDQ testing., и . IEEE J. Solid State Circuits, 32 (1): 122-125 (1997)Exploring the Mysteries of System-Level Test., , , , , , , , , и . ATS, стр. 1-6. IEEE, (2020)A Secure Low-Cost Edge Device Authentication Scheme for the Internet of Things., , , , и . VLSID, стр. 85-90. IEEE Computer Society, (2018)Relating Yield Models to Burn-In Fall-Out in Time., и . ITC, стр. 77-84. IEEE Computer Society, (2003)Statistical Estimation of Correlated Leakage Power Variation and Its Application to Leakage-Aware Design., , , , и . VLSI Design, стр. 606-612. IEEE Computer Society, (2006)Probabilistic Self-Adaptation of Nanoscale CMOS Circuits: Yield Maximization under Increased Intra-Die Variations., , , , и . VLSI Design, стр. 711-716. IEEE Computer Society, (2007)Distinguishing Resistive Small Delay Defects from Random Parameter Variations., и . Asian Test Symposium, стр. 325-330. IEEE Computer Society, (2010)