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Другие публикации лиц с тем же именем

Cache Coherence Protocol Design for Active Memory Systems., , и . PDPTA, стр. 83-89. CSREA Press, (2002)Zero Inclusion Victim: Isolating Core Caches from Inclusive Last-level Cache Evictions.. ISCA, стр. 71-84. IEEE, (2021)Integrating Memory Compression and Decompression with Coherence Protocols in Distributed Shared Memory Multiprocessors., и . ICPP, стр. 4. IEEE Computer Society, (2007)Exploiting Dynamic Reuse Probability to Manage Shared Last-level Caches in CPU-GPU Heterogeneous Processors., и . ICS, стр. 3:1-3:14. ACM, (2016)Pseudo-LIFO: the foundation of a new family of replacement policies for last-level caches.. MICRO, стр. 401-412. ACM, (2009)Performance Evaluation of Concurrent Lock-free Data Structures on GPUs., и . ICPADS, стр. 53-60. IEEE Computer Society, (2012)Bypass and insertion algorithms for exclusive last-level caches., , и . ISCA, стр. 81-92. ACM, (2011)Near-Optimal Access Partitioning for Memory Hierarchies with Multiple Heterogeneous Bandwidth Sources., , , и . HPCA, стр. 13-24. IEEE Computer Society, (2017)Pool directory: Efficient coherence tracking with dynamic directory allocation in many-core systems., и . ICCD, стр. 557-564. IEEE Computer Society, (2015)Improving CPU Performance Through Dynamic GPU Access Throttling in CPU-GPU Heterogeneous Processors., и . IPDPS Workshops, стр. 18-29. IEEE Computer Society, (2017)