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Disambiguation of "Velev, Miroslav N."

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TLSim and EVC: a term-level symbolic simulator and an efficient decision procedure for the logic of equality with uninterpreted functions and memories.

, and . Int. J. Embed. Syst., 1 (1/2): 134-149 (2005)

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Boris Velev

Desislava Veleva

Tsvetelina Veleva-Oreshkova

Miroslav Kroutvar

 

Other publications of authors with the same name

Encoding Global Unobservability for Efficient Translation to SAT.. SAT, (2004)TLSim and EVC: a term-level symbolic simulator and an efficient decision procedure for the logic of equality with uninterpreted functions and memories., and . Int. J. Embed. Syst., 1 (1/2): 134-149 (2005)Verification of Pipelined Microprocessors by Comparing Memory Execution Sequences in Symbolic Simulation., and . ASIAN, volume 1345 of Lecture Notes in Computer Science, page 18-31. Springer, (1997)Using positive equality to prove liveness for pipelined microprocessors.. ASP-DAC, page 316-321. IEEE Computer Society, (2004)Efficient translation of boolean formulas to CNF in formal verification of microprocessors.. ASP-DAC, page 310-315. IEEE Computer Society, (2004)Automatic Abstraction of Equations in a Logic of Equality.. TABLEAUX, volume 2796 of Lecture Notes in Computer Science, page 196-213. Springer, (2003)Collection of High-Level Microprocessor Bugs from Formal Verification of Pipelined and Superscalar Designs.. ITC, page 138-147. IEEE Computer Society, (2003)Exploiting Signal Unobservability for Efficient Translation to CNF in Formal Verification of Microprocessors.. DATE, page 266-271. IEEE Computer Society, (2004)Superscalar Processor Verification Using Efficient Reductions of the Logic of Equality with Uninterpreted Functions to Propositional Logic., and . CHARME, volume 1703 of Lecture Notes in Computer Science, page 37-53. Springer, (1999)Exploiting hierarchical encodings of equality to design independent strategies in parallel SMT decision procedures for a logic of equality., and . HLDVT, page 8-13. IEEE Computer Society, (2009)