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Real-Time Energy Efficient Hand Pose Estimation: A Case Study., , , , , , , и . Sensors, 20 (10): 2828 (2020)A Platform to Analyze DDR3 DRAM's Power and Retention Time., , , , и . IEEE Des. Test, 34 (4): 52-59 (2017)A Novel DRAM-Based Process-in-Memory Architecture and its Implementation for CNNs., , , , , , , и . ASP-DAC, стр. 35-42. ACM, (2021)Improving the error behavior of DRAM by exploiting its Z-channel property., , , , , и . DATE, стр. 1492-1495. IEEE, (2018)A Lean, Low Power, Low Latency DRAM Memory Controller for Transprecision Computing., , , , , и . SAMOS, том 11733 из Lecture Notes in Computer Science, стр. 429-441. Springer, (2019)An In-DRAM Neural Network Processing Engine., , , , , , и . ISCAS, стр. 1-5. IEEE, (2019)Fast validation of DRAM protocols with timed petri nets., , , , , и . MEMSYS, стр. 133-147. ACM, (2019)Efficient Generation of Application Specific Memory Controllers., , , , , , , , и . MEMSYS, стр. 233-247. ACM, (2020)Channel Models for Physical Unclonable Functions based on DRAM Retention Measurements., , , , , , и . REDUNDANCY, стр. 149-154. IEEE, (2019)Efficient Hardware Architectures for 1D- and MD-LSTM Networks., , , , , и . J. Signal Process. Syst., 92 (11): 1219-1245 (2020)