( en | de | ru )

 

Disambiguation of "Nazarian, Shahin"

Author of the publication

copydeleteadd this publication to your clipboard
qCG: A Low-Power Multi-Domain SFQ Logic Design and Verification Framework.

, , and . ICCD, page 446-449. IEEE, (2019)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Moras Nazarian

Esfandiar Nazarian

Esther Nazarian

Mohamed Shahin

Saad Shahin

 

Other publications of authors with the same name

Design and optimization of a reconfigurable power delivery network for large-area, DVS-enabled OLED displays., , , , and . ISLPED, page 159-164. IEEE, (2015)Efficient Task Mapping for Manycore Systems., , , , and . CoRR, (2020)NN-PARS: A Parallelized Neural Network Based Circuit Simulation Framework., , , , and . ISQED, page 452-456. IEEE, (2020)Energy optimal sizing of FinFET standard cells operating in multiple voltage regimes using adaptive independent gate control., , , , and . ACM Great Lakes Symposium on VLSI, page 73-74. ACM, (2014)VeriSFQ: A Semi-formal Verification Framework and Benchmark for Single Flux Quantum Technology., , , , , and . ISQED, page 224-230. IEEE, (2019)Leveraging Reinforcement Learning and Large Language Models for Code Optimization., , , , , , , , , and 1 other author(s). CoRR, (2023)A Majority Logic Synthesis Framework For Single Flux Quantum Circuits., , and . CoRR, (2023)VRoC: Variational Autoencoder-aided Multi-task Rumor Classifier Based on Text., , and . CoRR, (2021)Unlocking Deep Learning: A BP-Free Approach for Parallel Block-Wise Training of Neural Networks., , , , , , , and . CoRR, (2023)Approximate Logic Synthesis: A Reinforcement Learning-Based Technology Mapping Approach., , and . CoRR, (2019)