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ML-HW Co-Design of Noise-Robust TinyML Models and Always-On Analog Compute-in-Memory Edge Accelerator.

C. Zhou, F. García-Redondo, J. Büchel, I. Boybat, X. Comas, S. Nandakumar, S. Das, A. Sebastian, M. Gallo, and P. Whatmough. IEEE Micro, 42 (6): 76-87 (2022)

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A case for efficient accelerator design space exploration via Bayesian optimization.B. Reagen, J. Hernández-Lobato, R. Adolf, M. Gelbart, P. Whatmough, G. Wei, and D. Brooks. ISLPED, page 1-6. IEEE, (2017)DNN Engine: A 28-nm Timing-Error Tolerant Sparse Deep Neural Network Processor for IoT Applications.P. Whatmough, S. Lee, D. Brooks, and G. Wei. IEEE J. Solid State Circuits, 53 (9): 2722-2731 (2018)A 16-nm SoC for Noise-Robust Speech and NLP Edge AI Inference With Bayesian Sound Source Separation and Attention-Based DNNs.T. Tambe, E. Yang, G. Ko, Y. Chai, C. Hooper, M. Donato, P. Whatmough, A. Rush, D. Brooks, and G. Wei. IEEE J. Solid State Circuits, 58 (2): 569-581 (February 2023)SMAUG: End-to-End Full-Stack Simulation Infrastructure for Deep Learning Workloads.S. Xi, Y. Yao, K. Bhardwaj, P. Whatmough, G. Wei, and D. Brooks. ACM Trans. Archit. Code Optim., 17 (4): 39:1-39:26 (2020)Noisy Machines: Understanding Noisy Neural Networks and Enhancing Robustness to Analog Hardware Errors Using Distillation.C. Zhou, P. Kadambi, M. Mattina, and P. Whatmough. CoRR, (2020)Mobile Machine Learning Hardware at ARM: A Systems-on-Chip (SoC) Perspective.Y. Zhu, M. Mattina, and P. Whatmough. CoRR, (2018)Information contraction in noisy binary neural networks and its implications.C. Zhou, Q. Zhuang, M. Mattina, and P. Whatmough. CoRR, (2021)UDC: Unified DNAS for Compressible TinyML Models.I. Fedorov, R. Navarro, H. Tann, C. Zhou, M. Mattina, and P. Whatmough. CoRR, (2022)AnalogNets: ML-HW Co-Design of Noise-robust TinyML Models and Always-On Analog Compute-in-Memory Accelerator.C. Zhou, F. García-Redondo, J. Büchel, I. Boybat, X. Comas, S. Nandakumar, S. Das, A. Sebastian, M. Gallo, and P. Whatmough. CoRR, (2021)Braum: Analyzing and Protecting Autonomous Machine Software Stack.Y. Gan, P. Whatmough, J. Leng, B. Yu, S. Liu, and Y. Zhu. ISSRE, page 85-96. IEEE, (2022)

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Disambiguation of "Whatmough, Paul N."

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ML-HW Co-Design of Noise-Robust TinyML Models and Always-On Analog Compute-in-Memory Edge Accelerator.

Please choose a person to relate this publication to

n n n

n AÊ¿w n

N -L N Nguyen

n-hy n Yi

N Walz

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BibSonomy

Disambiguation of "Whatmough, Paul N."

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML ML-HW Co-Design of Noise-Robust TinyML Models and Always-On Analog Compute-in-Memory Edge Accelerator.

Please choose a person to relate this publication to

n n n

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N -L N Nguyen

n-hy n Yi

N Walz

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ML-HW Co-Design of Noise-Robust TinyML Models and Always-On Analog Compute-in-Memory Edge Accelerator.