Author of the publication

Introduction to special issue on demonstrable software systems and hardware platforms.

, and . ACM Trans. Design Autom. Electr. Syst., 12 (3): 20:1-20:3 (2007)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Power-Aware Bus Encoding Techniques for I/O and Data Buses in an Embedded System., and . Journal of Circuits, Systems, and Computers, 11 (4): 351-364 (2002)Power Simulation and Estimation in VLSI Circuits.. The VLSI Handbook, CRC Press, (1999)Timing-driven placement based on partitioning with dynamic cut-net control., and . DAC, page 472-476. ACM, (2000)Constructing Lower and Upper Bounded Delay Routing Trees Using Linear Programming., , and . DAC, page 401-404. ACM Press, (1996)Hierarchical Sequence Compaction for Power Estimation., , and . DAC, page 570-575. ACM Press, (1997)Dynamic Power Management Based on Continuous-Time Markov Decision Processes., and . DAC, page 555-561. ACM Press, (1999)Standard cell library based layout characterization and power analysis for 10nm gate-all-around (GAA) transistors., , , , and . SoCC, page 253-258. IEEE, (2016)Multi-objective optimization techniques for VLSI circuits., , and . ISQED, page 156-163. IEEE, (2011)All-Region Statistical Model for Delay Variation Based on Log-Skew-Normal Distribution., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 35 (9): 1503-1508 (2016)TEI-NoC: Optimizing Ultralow Power NoCs Exploiting the Temperature Effect Inversion., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 37 (2): 458-471 (2018)