Author of the publication

Modeling Lung Branching Morphogenesis: The title should not be broken here

, and . Multiscale Modeling of Developmental Systems, volume 81 of Current Topics in Developmental Biology, Academic Press, (2008)
DOI: 10.1016/S0070-2153(07)81010-6

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

7.6 A 90nm embedded 1T-MONOS flash macro for automotive applications with 0.07mJ/8kB rewrite energy and endurance over 100M cycles under Tj of 175°C., , , , , , , , , and 3 other author(s). ISSCC, page 140-141. IEEE, (2016)A 65nm Silicon-on-Thin-Box (SOTB) Embedded 2T-MONOS Flash Achieving 0.22 pJ/bit Read Energy with 64 MHz Access for IoT Applications., , , , , , , , , and 2 other author(s). VLSI Circuits, page 202-. IEEE, (2019)Highly Reliable Silica-LiNbO3 Hybrid Modulator Using Heterogeneous Material Integration Technology., , , , , , , , , and . IEICE Trans. Electron., 103-C (8): 353-361 (2020)LCD Backlight Control for Visibility of Monocular Head-Mounted Displays., , , and . IAS, page 1-5. IEEE, (2009)Fully automatic rapid DNA Ploidy Analyzer for intraoperative rapid diagnosis support., , , , , , , , , and 3 other author(s). EMBC, page 906-909. IEEE, (2013)Spread-Spectrum Clock Generator for Serial ATA with Multi-Bit Sigma-Delta Modulator-Controlled Fractional PLL., , , , , , , , and . IEICE Trans. Electron., 89-C (11): 1682-1688 (2006)A 24MB Embedded Flash System Based on 28nm SG-MONOS Featuring 240MHz Read Operations and Robust Over-The-Air Software Update for Automotive., , , , , , , , , and . VLSI Circuits, page 210-. IEEE, (2019)A 40nm Embedded SG-MONOS Flash Macro for High-end MCU Achieving 200MHz Random Read Operation and 7.91Mb/mm2 Density with Charge Assisted Offset Cancellation Sense Amplifier., , , , , , , , , and 5 other author(s). A-SSCC, page 1-3. IEEE, (2021)3.2 multi-standard 185fsrms 0.3-to-28Gb/s 40dB backplane signal conditioner with adaptive pattern-match 36-Tap DFE and data-rate-adjustment PLL in 28nm CMOS., , , , , , , , , and 10 other author(s). ISSCC, page 1-3. IEEE, (2015)3.3 A 25Gb/s multistandard serial link transceiver for 50dB-loss copper cable in 28nm CMOS., , , , , , , , , and 9 other author(s). ISSCC, page 60-61. IEEE, (2016)