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A Multi-Mode 8k-MAC HW-Utilization-Aware Neural Processing Unit With a Unified Multi-Precision Datapath in 4-nm Flagship Mobile SoC., , , , , , , , , and 7 other author(s). IEEE J. Solid State Circuits, 58 (1): 189-202 (2023)Securing More Registers with Reduced Instruction Encoding Architectures., , and . RTCSA, page 417-425. IEEE Computer Society, (2007)Neutral model-based interfacing of 3D design to support collaborative project management in the process plant industry., , , , , , and . J. Comput. Des. Eng., 8 (3): 824-835 (2021)Unroll-Based Copy Elimination for Enhanced Pipeline Scheduling., , , and . LCPC, volume 1863 of Lecture Notes in Computer Science, page 85-99. Springer, (1999)Procrustes1: Power Constrained Performance Improvement Using Extended Maximize-Then-Swap Algorithm., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 34 (10): 1664-1676 (2015)Learning-Based Power/Performance Optimization for Many-Core Systems With Extended-Range Voltage/Frequency Scaling., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 35 (8): 1318-1331 (2016)Unroll-Based Copy Elimination for Enhanced Pipeline Scheduling., , , and . IEEE Trans. Computers, 51 (9): 977-994 (2002)Unroll-based register coalescing., , , and . ICS, page 296-305. ACM, (2000)Optimistic Register Coalescing., and . IEEE PACT, page 196-204. IEEE Computer Society, (1998)Experiences with Retargeting the Java Hotspot(tm) Virtual Machine., , , and . IPDPS, IEEE Computer Society, (2002)