%0 Conference Paper %1 conf/fpt/WuDW10 %A Wu, Guiming %A Dou, Yong %A Wang, Miao %B FPT %D 2010 %E Bian, Jinian %E Zhou, Qiang %E Athanas, Peter %E Ha, Yajun %E Zhao, Kang %I IEEE %K dblp %P 134-137 %T High performance and memory efficient implementation of matrix multiplication on FPGAs. %U http://dblp.uni-trier.de/db/conf/fpt/fpt2010.html#WuDW10 %@ 978-1-4244-8981-7

@inproceedings{conf/fpt/WuDW10, added-at = {2017-05-24T00:00:00.000+0200}, author = {Wu, Guiming and Dou, Yong and Wang, Miao}, biburl = {https://www.bibsonomy.org/bibtex/25896e879af0df8ac4f36c13eec9327e5/dblp}, booktitle = {FPT}, crossref = {conf/fpt/2010}, editor = {Bian, Jinian and Zhou, Qiang and Athanas, Peter and Ha, Yajun and Zhao, Kang}, ee = {https://doi.org/10.1109/FPT.2010.5681769}, interhash = {0d0733daa9e9d15e061a48412e381fda}, intrahash = {5896e879af0df8ac4f36c13eec9327e5}, isbn = {978-1-4244-8981-7}, keywords = {dblp}, pages = {134-137}, publisher = {IEEE}, timestamp = {2018-02-02T11:37:30.000+0100}, title = {High performance and memory efficient implementation of matrix multiplication on FPGAs.}, url = {http://dblp.uni-trier.de/db/conf/fpt/fpt2010.html#WuDW10}, year = 2010 }