%0 Journal Article %1 journals/jsa/LiuZT04 %A Liu, Jian %A Zheng, Li-Rong %A Tenhunen, Hannu %D 2004 %J J. Syst. Archit. %K dblp %N 2-3 %P 65-79 %T Interconnect intellectual property for Network-on-Chip (NoC). %U http://dblp.uni-trier.de/db/journals/jsa/jsa50.html#LiuZT04 %V 50

@article{journals/jsa/LiuZT04, added-at = {2020-05-19T00:00:00.000+0200}, author = {Liu, Jian and Zheng, Li-Rong and Tenhunen, Hannu}, biburl = {https://www.bibsonomy.org/bibtex/2a7caff6376648c5ca52600eaf7d48fd6/dblp}, ee = {https://doi.org/10.1016/j.sysarc.2003.07.003}, interhash = {0fd953334f52131bc6e77102c2870f84}, intrahash = {a7caff6376648c5ca52600eaf7d48fd6}, journal = {J. Syst. Archit.}, keywords = {dblp}, number = {2-3}, pages = {65-79}, timestamp = {2020-05-20T11:51:17.000+0200}, title = {Interconnect intellectual property for Network-on-Chip (NoC).}, url = {http://dblp.uni-trier.de/db/journals/jsa/jsa50.html#LiuZT04}, volume = 50, year = 2004 }