( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
Interconnect intellectual property for Network-on-Chip (NoC).

, , и . J. Syst. Archit., 50 (2-3): 65-79 (2004)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

John Tenhunen

Hannu Peltola

John Tenhunen

Thomas Hannus

Hannu Rauhala

 

Другие публикации лиц с тем же именем

A Design of Operational Amplifier for Sigma Delta Modulators Using 0.35um CMOS Process., и . VLSI, том 162 из IFIP Conference Proceedings, стр. 23-34. Kluwer, (1999)Special issue on networks on chip., , и . J. Syst. Archit., 50 (2-3): 61-63 (2004)Can Dark Silicon Be Exploited to Prolong System Lifetime?, , , , , , и . IEEE Des. Test, 34 (2): 51-59 (2017)Private reliability environments for efficient fault-tolerance in CGRAs., , , , , и . Des. Autom. Embed. Syst., 18 (3-4): 295-327 (2014)PDNOC: Partially diagonal network-on-chip for high efficiency multicore systems., , , , и . Concurr. Comput. Pract. Exp., 27 (4): 1054-1067 (2015)Energy-Aware VM Consolidation in Cloud Data Centers Using Utilization Prediction Model., , , , , и . IEEE Trans. Cloud Comput., 7 (2): 524-536 (2019)Skewing-based method for reduction of functional crosstalk and power supply noise caused by on-chip buses., , и . IET Comput. Digit. Tech., 6 (2): 114-124 (2012)InP-HBT chip-set for 40-Gb/s fiber optical communication systems operational at 3 V., , , , , , , , и . IEEE J. Solid State Circuits, 32 (9): 1371-1383 (1997)Energy-aware fault-tolerant network-on-chips for addressing multiple traffic classes., , , , , и . Microprocess. Microsystems, 37 (8-A): 811-822 (2013)A trojan framework in AES core to evade state-of-the-art HT detection schemes., , , , , , и . Microelectron. J., (2021)