%0 Journal Article %1 journals/tvlsi/Mottaghi-DastjerdiAP09 %A Mottaghi-Dastjerdi, M. %A Afzali-Kusha, Ali %A Pedram, Massoud %D 2009 %J IEEE Trans. Very Large Scale Integr. Syst. %K dblp %N 2 %P 302-306 %T BZ-FAD: A Low-Power Low-Area Multiplier Based on Shift-and-Add Architecture. %U http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi17.html#Mottaghi-DastjerdiAP09 %V 17

@article{journals/tvlsi/Mottaghi-DastjerdiAP09, added-at = {2020-03-11T00:00:00.000+0100}, author = {Mottaghi-Dastjerdi, M. and Afzali-Kusha, Ali and Pedram, Massoud}, biburl = {https://www.bibsonomy.org/bibtex/2ba8a40a05f24a39fdcc9210c57e2a175/dblp}, ee = {https://doi.org/10.1109/TVLSI.2008.2004544}, interhash = {258d527434b74888a567a8fffe2898ee}, intrahash = {ba8a40a05f24a39fdcc9210c57e2a175}, journal = {IEEE Trans. Very Large Scale Integr. Syst.}, keywords = {dblp}, number = 2, pages = {302-306}, timestamp = {2020-03-12T11:42:01.000+0100}, title = {BZ-FAD: A Low-Power Low-Area Multiplier Based on Shift-and-Add Architecture.}, url = {http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi17.html#Mottaghi-DastjerdiAP09}, volume = 17, year = 2009 }