%0 Conference Paper %1 conf/arith/SmithD87 %A Smith, Steven G. %A Denyer, Peter B. %B IEEE Symposium on Computer Arithmetic %D 1987 %E Irwin, Mary Jane %E Stefanelli, Renato %I IEEE Computer Society %K dblp %P 13-20 %T Synthesis of area-efficient VLSI architectures for vector and matrix multiplication. %U http://dblp.uni-trier.de/db/conf/arith/arith1987.html#SmithD87 %@ 0-8186-0774-2

@inproceedings{conf/arith/SmithD87, added-at = {2017-05-21T00:00:00.000+0200}, author = {Smith, Steven G. and Denyer, Peter B.}, biburl = {https://www.bibsonomy.org/bibtex/2a8dc6aee134c1eb1b20bf1536bc14248/dblp}, booktitle = {IEEE Symposium on Computer Arithmetic}, crossref = {conf/arith/1987}, editor = {Irwin, Mary Jane and Stefanelli, Renato}, ee = {https://doi.org/10.1109/ARITH.1987.6158718}, interhash = {7328d27a80ebda5cbe50ccdb3b3524d4}, intrahash = {a8dc6aee134c1eb1b20bf1536bc14248}, isbn = {0-8186-0774-2}, keywords = {dblp}, pages = {13-20}, publisher = {IEEE Computer Society}, timestamp = {2019-10-17T19:28:47.000+0200}, title = {Synthesis of area-efficient VLSI architectures for vector and matrix multiplication.}, url = {http://dblp.uni-trier.de/db/conf/arith/arith1987.html#SmithD87}, year = 1987 }