%0 Journal Article %1 pankratovvertical %A Pankratov, E.L. %D 2015 %E Artyom, Grigoryan %J International Journal of Applied Control, Electrical and Electronics Engineering (IJACEEE) %K Transistor-transistor logic %N 3 %P 1-23 %T On Vertical Integration Framework Element of Transistor-Transistor Logic %U https://airccse.com/ijaceee/papers/3315ijaceee01.pdf %V 3 %X In this paper we introduce an approach to increase vertical integration of elements of transistor-transistor logic with function AND-NOT. Framework the approach we consider a heterostructure with special configuration. Several specific areas of the heterostructure should be doped by diffusion or ion implantation. Annealing of dopant and/or radiation defects should be optimized.

@article{pankratovvertical, abstract = {In this paper we introduce an approach to increase vertical integration of elements of transistor-transistor logic with function AND-NOT. Framework the approach we consider a heterostructure with special configuration. Several specific areas of the heterostructure should be doped by diffusion or ion implantation. Annealing of dopant and/or radiation defects should be optimized. }, added-at = {2019-11-14T12:55:19.000+0100}, author = {Pankratov, E.L.}, biburl = {https://www.bibsonomy.org/bibtex/240e2c5a2a5a033d22eb16f196719cd1e/electical12345}, editor = {Artyom, Grigoryan}, interhash = {a89fed5b00a49ea8c32b63ac89975cfe}, intrahash = {40e2c5a2a5a033d22eb16f196719cd1e}, issn = {2394-0816}, journal = {International Journal of Applied Control, Electrical and Electronics Engineering (IJACEEE)}, keywords = {Transistor-transistor logic}, language = {English}, month = aug, number = 3, pages = {1-23}, timestamp = {2019-11-14T12:55:19.000+0100}, title = {On Vertical Integration Framework Element of Transistor-Transistor Logic}, url = {https://airccse.com/ijaceee/papers/3315ijaceee01.pdf}, volume = 3, year = 2015 }